1. Field of the Invention
This invention relates generally to processor architecture and more particularly to packet classification for a network interface.
2. Description of the Related Art
Servers having multiple cores on a shared network interface on a chip require that an incoming packet be classified in order to determine which of the multiple cores are assigned to handle the particular packet. Without the packet classifier, incoming packets from a single flow may be assigned to different cores resulting in serialization of processing between cores. Packets of the same flow may still be assigned to the same processor core, however, this process has more overhead. For example, if the packet is forwarded to the wrong core, that core may need to forward the packet to the correct core.
Packet classification systems typically require that a match on the L2–L4 section of the packet header is made to identify a particular flow. One packet classification algorithm incorporates a single hashing into the packet classification process. Here, a single hash value corresponding to the combined fields of interest, i.e., source, destination, port number, etc., of the packet is calculated. The calculated hash value is then used to index in a lookup table containing the exact L2–L4 flow information, i.e., key for use in a matching operation. However, the size of the lookup table becomes excessive when dealing with the millions of flows which can be active at the same time in a multi-core/multi-thread chip especially with regard to a server application. Additionally, the communication link with the lookup table needs to have a high bandwidth to support the packet classification system, especially in high bandwidth environments, such as a multiple 1 gigabit (GB) environment or a 10 GB environment. Therefore, the hashing algorithms used for packet classification are not optimal for a server having multi-core/multi-thread chips due to the excessive size of the lookup table required to support such a system.
FIG. 1 is a graphical representation of a hash lookup table used for packet classification. Hash lookup table 100 consists of a number of rows and columns. Key 102 is extracted from an incoming packet header. A hash is then calculated to provide row number 104. The calculated hash is then used to index into the row where key 102 is stored. The entire key is stored in the indexed position of hash table 100. Hardware then extracts the keys and compares each key with the incoming key to find an exact match. Depending on the Internet protocol (IP) used for transmitting the data over the Internet each key is between about 100 and about 300 bits. Accordingly, a table storing a large number of keys becomes excessively large. Additionally, the bandwidth required for supporting a multi-chip/multi-core processing environment also becomes excessive.
In view of the forgoing, there is a need define a packet classification system configured to efficiently support a multi-chip/multi-core processing environment in a manner that reduces the bandwidth required to support the classification system and reduces the storage requirements for the lookup table.